Flipped voltage follower based low noise amplifier with 640 MHz BW at 2.26 GHz, 1.3 dB NF, 1.2V Vdd, and up to 10 dBm IIP3

Abstract

The design, implementation and characterization of four Low Noise Amplifier architectures in a double poly, four metal layers, 0.35 mm CMOS technology from AMS AG biased at 1.2 V with a power consumption as low as 2.73 mW operating in a frequency band ranging from 1.94 to 2.58 GHz with Noise Figure around 1.3 dB and input intercept point up to 10 dBm are presented. With the performance exhibited by the proposed topologies, it is demonstrated that the use of the Flipped Voltage Follower structure is feasible to realize amplifiers at radio frequencies with low noise figure and good linearity performance preserving its characteristic low power consumption.